[aplusdev] AIX port

[John.Mizel at morganstanley.com]

I see that we distributed the header file a/pwr2hpc.h, but not the c files
(we'll look into adding them in the next release). I think most of the
optimizations had to do with hand unrolling loops to take advantage or AIX
quad load instructions.

Thanks,
John

On Thu, 20 Sep 2001, Olivier Lefevre wrote:

> > optimizations specifically for the power architecture.
>
> This is interesting. Of what kind? Using the Altivec ISA,
> per chance, or something else?
>
> Regards,
>
> -- O.L.
>
>